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-  NOTE: Besure to read the section under "Release Notes" for new feature additions. -
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Included in the D-BugS08 v4.x.x distribution are two variations of D-BugS08. The
bootloader and D-BugS08 S-Record files with a Ô-8Õ in the name are for systems
using an 8.0 MHz crystal or oscillator.  The bootloader and D-BugS08 S-Record files
with a Ô-16Õ in the name are for systems using a 16.0 MHz crystal or oscillator.
Details on customizing the bootloader and D-BugS08 for use in systems with other
crystal or oscillator frequencies can be found in Appendix B of the D-BugS08 Reference
Guide.

Note that the supplied S-Record files are in the linear load address format (the
format used by D-BugS08's FLOAD command). If a tool requiring 'banked' S-Records
(such as the Codewarrior tool chain) is used to program the S-Record files into an
EVB, both the D-BugS08 and Bootloader S-Record files can be converted to banked format
using the included SRecCvt.exe utility. The following command line can be used to
convert the files:

sreccvt -m c0000 fffff 32 -ob -o <OutfileName.S19> <InFileName.S19>

With this distribution, a folder containing the 'include' files needed to assemble
BootDP256.Asm has been included. In addition, the BootDP256.Asm file was modified so
that it can be assembled with MCUez.

Note that the Motorola DP256 EVB is shipped WITHOUT the XFC capacitors installed in
locations C13 and C14. These parts are REQUIRED for D-Bug12 operation since the PLL is
used to increase the bus frequency to 24 MHz. Operation without these components will,
at best, result in VERY unstable serial communications. Capacitor values of 0.033uF and
0.0033uF can be used for C13 and C14 respectively.

Release Notes


Version 1.0.0b6
---------------

Changed the Device Descriptor table to add Primary, Secondary and Phantom MCUID fields.
This allows a single table  entry to describe either a real device mask set or a larger
device that is being used to 'emulate' a smaller device (i.e. fewer memory resources, perpherals,
etc.).

The MC9S08DZ48 and MC9S08DZ32 phantom devices were added.
 
The MCGClockCalibrate() function was not using the FTRIM to calibrate to 9 bits of trim.
This caused an 8-bit trim value to be returned, which in turn caused the FBULK & FSERASE
commands to divide the 8-bit value by 2. resulting in an incorrect trim value to be programmed
into Flash.

Support was added for the MC9S08QD4 and MC9S08EL32.

The FBULK and FSERASE commands were changed to preserve any internal clock calibration
information stored in Flash. See the D-BugS08 reference manual for additional information.

The CAL command was added. This command can be used to calibrate the internal clock reference.
See the D-BugS08 reference manual for additional information.

The clock calibration routines were rewritten for the ICG, ICS & MCG modules. The accuracy of
the trim operation relative to the clock source of the microcontroller running the D-BugS08
firmware is within the specifications of of the target S08 device. The absolute accuracy of
the reference clock in the ICG, ICS & MCG modules will depend on the absolute accuracy of the
clock source of the microcontroller running the D-BugS08 firmware.


Version 1.0.0b5
---------------

Modified FSERASE command to work with the S08DZ60. The DZ60's 768 byte sector size
(non-even power of 2) caused problems with the algorithm used to determine the start and end
of a sector. The DZ60 is treated as a special case.

Fixed issues with the calculation of the FCDIV register value in the FBULK and FSERASE command.

Unlike the S12 family, the BDC status register can be read even when the device is secured.
This allowed the GetTargetStatus() function to return a valid target status and the display of
the "S>" prompt even though the target MCU was secured. I changed the ChkBDMConnection() function
(called by GetTargetStatus()) to return a value of 0x00 if the security byte at 0xffbf reads 0x00.
In turn, this will cause the "Can't Communicate..." menu to be displayed.

Version 1.0.0b4
---------------

Added support for the MC9S12AW60 and MC9S12DZ60


Version 1.0.0b3
---------------

Added support for the MC9S08QG8.
 
For devices not having a dedicated reset pin, the RESET command  resets the target device
into active background mode by writing to the SBDFR register via the BDM and holding the
BKGD pin low immediately after the write. For these devices, D-BugS08 does not monitor the
reset pin and report target initiated resets.

Version 1.0.0b2
---------------

When the code base was moved from D-Bug12, the RAMBase constant had been changed in the
file ConfigSC.s which prevented  D-BugS08 from running on 128K S12 devices. Very little
of the data in the ConfigSC.s file is used by StartDP256.s file, so the constants that
were use were moved to StartDP256.s and ConfigSC.s is no longer #included.

Version 1.0.0b1
---------------

Initial release. Code base taken from D-Bug12 v4.0.0b29
